Scalable Instruction Set Extension for Dual - field Public - key Cryptosystem

Abstract—As the higher security per bit compared with traditional symmetric-key cryptography, public-key cryptography has always been attractive in security system. But usually the cost is high and efficiency is low because of complex algorithm. Unlike common hardware solution based on FPGA or system on chip (SOC), an instruction set architecture (ISA) extension of embedded processor has been proposed. Firstly the extended function unit is introduced, and the structure is scalable according to different applications. Then the extended instruction set is proposed under a new architecture, to overcome the weakness of traditional ISA extension, such as the flexibility for multiple extended functions and the difficulty of implementation. Opposite to original ISA, detail operation of extended instruction has been treated as side effects of data transfer, to keep the architecture of embedded processor and compilation tools basically unchanged. Test results show that point multiplication on GF(2160) can be done in 181 us, by the cost of 124k gates.